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SY88343DL
3.3V, 3.2Gbps CML Limiting Post Amplifier with High-Gain TTL Loss-of-Signal
General Description
The SY88343DL low-power, high-sensitivity, limiting, post amplifier is designed for use in fiber-optic receivers. The device connects to typical transimpedance amplifiers (TIAs). The linear signal output from TIAs can contain significant amounts of noise and may vary in amplitude over time. The SY88343DL quantizes these signals and outputs CML level waveforms. The SY88343DL operates from a single +3.3V power supply, over temperatures ranging from -40oC to +85oC. With its wide bandwidth, high gain, and signals with data rates up to 3.2Gbps and as small as 5mVPP can be amplified to drive devices with CML inputs or ACcoupled CML/PECL inputs. The SY88343DL generates a high-gain loss-of-signal (LOS) open-collector TTL output. This function has a high-gain input stage for increased LOS sensitivity. A programmable loss-of-signal level set pin (LOSLVL) sets the sensitivity of the input amplitude detection. LOS asserts high if the input amplitude falls below the threshold set by LOSLVL and de-asserts low otherwise. The enable bar input (/EN) de-asserts the true output signal without removing the input signal. The LOS output can be fed back to the /EN input to maintain output stability under a loss-of-signal condition. Typically, 3.5dB LOS hysteresis is provided to prevent chattering. All support documentation can be found on Micrel's web site at: www.micrel.com.
Features
* * * * * * * * * Single 3.3V power supply 155Mbps to 3.2Gbps operation Low-noise CML data outputs High-gain LOS Chatter-free open-collector TTL Loss-of-Signal (LOS) output with internal 4.75k pull-up resistor TTL /EN input Programmable LOS level set (LOSLVL) Ideal for mutil-rate applications Available in a tiny (3mm x 3mm) 16-pin MLF(R) package APON, BPON, EPON, GEPON, and GPON Gigabit Ethernet 1X and 2X Fibre Channel SONET/SDH : OC 3/12/24/48 - STM 1/4/8/16 High-gain line driver and line receiver FTTP Optical transceivers Datacom/Telecom Low-gain TIA interface Long reach FOM
Applications
* * * * * * * * * *
Markets
MLF and MicroLeadFrame are registered trademarks of Amkor Technology. Micrel Inc. * 2180 Fortune Drive * San Jose, CA 95131 * USA * tel +1 (408) 944-0800 * fax + 1 (408) 474-1000 * http://www.micrel.com
February 2007
M9999-021207-B hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88343DL
Typical Application
Ordering Information
Part Number SY88343DLMG SY88343DLMGTR(1) Note: 1. Tape and Reel. Package Type MLF-16 MLF-16 Operating Range Industrial Industrial Package Marking 343D with Pb-Free bar line indicator 343D with Pb-Free bar line indicator Lead Finish NiPdAu Pb-Free NiPdAu Pb-Free
Pin Configuration
16-Pin MLF(R) (MLF-16)
February 2007
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Micrel, Inc.
SY88343DL
Pin Description
Pin Number MLF(R) 15 1 4 6 14 2, 3, 10, 11 Pin Name /EN DIN /DIN VREF LOSLVL GND, Exposed Pad LOS /DOUT DOUT VCC Input Ground Open-collector TTL output w/internal 4.75k pull-down resistor CML Output CML Output Power Supply Type TTL Input: Default is HIGH. Data Input Data Input Pin Functioon /Enable: This input enables the outputs when it is LOW. Note that this input is internally connected to a 25k pull-up resistor and will default to logic HIGH state if left open. True data input. Complementary data input. Reference Voltage: Bypass with 0.1F low ESR capacitor from VREF to VCC to stabilize LOSLVL and VREF. Loss-of-Signal Level Set: a resistor from this pin to VCC sets the threshold for the data input amplitude at which LOS will be asserted. Device ground. GND and Exposed pad are to be tied to the same ground plane. Loss-of-Signal: asserts high when the data input amplitude falls below the threshold sets by LOSLVL. Complementary data output. True data output. Positive power supply.
7 9 12 5, 8, 13, 16
February 2007
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M9999-021207-B hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88343DL
Absolute Maximum Ratings(1)
Supply Voltage (VCC) .................................... 0V to +4.0V Input Voltage (DIN, /DIN) ................................... 0 to VCC Output Current (IOUT).................................+/- 25mA /EN Voltage ........................................................ 0 to VCC VREF Current.................................-800uA to + 500uA LOSLVL Voltage.............................................. VREF to VCC Lead Temperature (soldering, 20sec.) .................. 260C Storage Temperature (Ts) .....................-65C to +150C
Operating Ratings(2)
Supply Voltage (VCC)..............................+3.0V to +3.6V Ambient Temperature (TA)....................-40C to +85C Junction Temperature (TJ) ..................-40C to +125C Junction Thermal Resistance MLF(R) (JA) Still-air ..................................................... 61C/W MLF(R) (JB) Junction-to-board .....................................38oC/W
DC Electrical Characteristics
VCC = 3.0V to 3.6V; RL = 50 to VCC; TA = -40C to +85C.
Symbol ICC LOSLVL VOH VOL VOFFSET ZO VREF VIHCMR Parameter Power Supply Current LOSLVL Voltage CML Output HIGH Voltage CML Output LOW Voltage Differential Output Offset Single-Ended Output Impedance Reference Voltage Input Common Mode Range GND+2.0 40 50 VCC-1.28 VCC VCC = 3.3V Condition No output load VREF VCC-0.020 VCC-0.475 VCC-0.005 VCC-0.400 Min Typ 45 Max 62 VCC VCC VCC-0.350 80 60 Units mA V V V mV V V
TTL DC Electrical Characteristics
VCC = 3.0V to 3.6V; RL = 50 to VCC; TA = -40C to +85C.
Symbol VIH VIL IIH IIL VOH VOL Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential (GND) on the PCB. JB uses 4-layer (JA) in still-air-number, unless otherwise stated. Parameter /EN Input HIGH Voltage /EN Input LOW Voltage /EN Input HIGH Current /EN Input LOW Current LOS Output HIGH Level LOS Output LOW Level VIN = 2.7V VIN = VCC VIN = 0.5V VCC > 3.3V, IOH-MAX < 160A VCC < 3.3V, IOH-MAX < 160A IOL = +2mA -300 2.4 2.0 0.5 Condition Min 2.0 0.8 20 100 V A A A V V V Typ Max Units
February 2007
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M9999-021207-B hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88343DL
AC Electrical Characteristics
VCC = 3.0V to 3.6V; RL = 50 to VCC; TA = -40C to +85C.
Symbol tr, tf tJITTER VID VOD TOFF TON LOSAL LOSDL HYSL LOSAM LOSDM HYSM LOSAH LOSDH HYSH B-3dB AV(Diff) S21 Notes: 4. Amplifier in limiting mode. Input is a 200MHz square wave. 5. Deterministic jitter measured using 3.2Gbps K28.5 pattern, VID = 10mVPP. 6. Random jitter measured using 3.2Gbps K28.7 pattern, VID = 10mVPP. 7. This specification defines electrical hysteresis as 20log (LOS De-assert/LOS Assert). The ratio between optical hysteresis and electrical hysteresis is found to vary between 1.5 and 2, depending upon the level of received optical power and ROSA characteristics. Based on that ratio, the optical hysteresis corresponding to the electrical hysteresis range 2dB-4.5dB, shown in the AC characteristics table, will be 1dB-3dB Optical Hysteresis. 8. See "Typical Operating Characteristics" for a graph showing how to choose a particular RLOSLVL for a particular LOS assert and its associated de-assert amplitude. Parameter Output Rise/Fall Time (20% to 80%) Deterministic Random Differential Input Voltage Swing Differential Output Voltage Swing LOS Release Time LOS Assert Time Low LOS Assert Level Low LOS De-assert Level Low LOS Hysteresis Medium LOS Assert Level Medium LOS De-assert Level Medium LOS Hysteresis High LOS Assert Level High LOS De-assert Level High LOS Hysteresis 3dB Bandwidth Differential Voltage Gain Single-ended Small-Signal Gain 32 26 RLOSLVL = 15k, Note 8 RLOSLVL = 15k, Note 8 RLOSLVL = 15k, Note 7 RLOSLVL = 5k, Note 8 RLOSLVL = 5k, Note 8 RLOSLVL = 5k, Note 7 RLOSLVL = 100, Note 8 RLOSLVL = 100, Note 8 RLOSLVL = 100, Note 7 2 2 8 2 Condition Note 4 Note 5 Note 6 Figure 1 VID > 12mVPP, Figure 1 5 700 800 2 2 3.0 4.5 3.5 5.0 7.5 3.5 12 18 3.5 2 38 32 23 4.5 11 4.5 Min Typ 60 15 5 1800 950 10 10 Max 120 Units ps psPP psRMS mVPP mVPP s s mVPP mVPP dB mVPP mVPP dB mVPP mVPP dB GHz dB dB
February 2007
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M9999-021207-B hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88343DL
Typical Operating Characteristics
February 2007
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M9999-021207-B hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88343DL
Functional Block Diagram
Detailed Description
The SY88343DL high-sensitivity limiting post amplifier operates from a single +3.3V power supply, over temperatures from -40oC to +85oC. Signals with data rates up to 3.2Gbps and as small as 5mVPP can be amplified. Figure 1 shows the allowed input voltage swing. The SY88343DL generates a LOS output. LOSLVL sets the sensitivity of the input amplitude detection. Input Amplifier/Buffer Figure 2 shows a simplified schematic of the SY88343DL's input stage. The high-sensitivity of the input amplifier allows signals as small as 5mVPP to be detected and amplified. The input amplifier also allows input signals as large as 1800mVPP. Input signals are linearly amplified with a typical 38dB differential voltage gain. Since it is a limiting amplifier, the SY88343DL outputs typically 800mVPP voltage-limited waveforms for input signals that are greater than 12mVPP. Applications requiring the SY88343DL to operate with high-gain should have the upstream TIA placed as close as possible to the SY88343DL's input pins to ensure the best performance of the device. Output Buffer The SY88343DL's CML output buffer is designed to drive 50 lines. The output buffer requires appropriate termination for proper operation. An external 50 resistor to VCC for each output pin provides this. Figure 3 shows a simplified schematic of the output stage.
Loss-of-signal The SY88343DL generates a chatter-free LOS opencollector TTL output with an internal 4.75k pull-up resistor, as shown in Figure 4. LOS is used to determine that the input amplitude is large enough to be considered a valid input. LOS asserts high if the input amplitude falls below the threshold set by LOSLVL and de-asserts low otherwise. LOS can be fed back to the enable bar (/EN) input to maintain output stability under a loss of signal condition. /EN deasserts the true output signal without removing the input signals. Typically, 3.5dB LOS hysteresis is provided to prevent chattering. Loss-of-signal Level Set A programmable LOS level set pin (LOSLVL) sets the threshold of the input amplitude detection. Connecting an external resistor between VCC and LOSLVL sets the voltage at LOSLVL. This voltage ranges from VCC to VREF. The external resistor creates a voltage divider between VCC and VREF, as shown, in Figure 5. Hysteresis The SY88343DL typically provides 3.5dB LOS electrical hysteresis. By definition, a power ratio measured in dB is 10log (power ratio). Power is calculated as V2IN/R for an electrical signal. Hence, the same ratio can be stated as 20log (voltage ratio). While in linear mode, the electrical voltage input changes linearly with the optical power and therefore, the ratios change linearly. Thus, the optical hysteresis in dB is half the electrical hysteresis in dB given in the data sheet. Since the SY88343DL is an electrical device, this data sheet refers to hysteresis in electrical terms. With 3.5dB LOS hysteresis, a voltage factor of 1.5 is required to assert or de-assert LOS.
February 2007
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M9999-021207-B hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88343DL
Figure 1. VIS and VID Definition
Figure 2. Input Structure
Figure 3. Output Structure
Figure 4. Input Structure
Figure 5. LOSLVL Setting Circuit
February 2007
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M9999-021207-B hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88343DL
Package Information
16-Pin (3mm x 3mm) MLF(R) (MLF-16)
PCB Thermal Consideration for 16-Pin MLF(R) Package Package Notes: 1. Package meets Level 2 qualification. 2. All parts are dry-packaged before shipment. 3. Exposed pad must be soldered to a ground for proper thermal management.
February 2007
9
M9999-021207-B hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88343DL
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2006 Micrel Incorporated
February 2007
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